Systems and methods for bonding semiconductor elements

ABSTRACT

A method of ultrasonically bonding semiconductor elements includes the steps of: (a) aligning surfaces of a plurality of first conductive structures of a first semiconductor element to respective surfaces of a plurality of second conductive structures of a second semiconductor element, wherein the surfaces of each of the plurality of first conductive structures and the plurality of second conductive structures include aluminum; and (b) ultrasonically bonding ones of the first conductive structures to respective ones of the second conductive structures.

CROSS-REFERENCE TO RELATED APPLICATION

This application is a divisional application of application Ser. No. 14/822,164, filed Aug. 10, 2015, which is a continuation application of application Ser. No. 14/505,609 filed Oct. 3, 2014, now U.S. Pat. No. 9,136,240, which claims the benefit of Provisional Application No. 61/888,203, filed Oct. 8, 2013, the content of each of which is incorporated herein by reference.

FIELD OF THE INVENTION

The present invention relates to the formation of semiconductor packages, and more particularly, to improved systems and methods for bonding semiconductor elements together.

BACKGROUND OF THE INVENTION

Traditional semiconductor packaging typically involves die attach processes and wire bonding processes. Advanced semiconductor packaging technologies (e.g., flip chip bonding, thermo-compression bonding, etc.) technologies are gaining more traction in this industry. For example, in thermo-compression bonding, heat and pressure are used to form a plurality of interconnections between semiconductor elements.

While advanced packaging technologies are increasingly utilized there are many limitations in these technologies including, for example, limitations related to the relative infancy of some advanced packaging technologies. Thus, it would be desirable to provide improved systems for, and methods of, bonding semiconductor elements together.

SUMMARY OF THE INVENTION

According to an exemplary embodiment of the present invention, a method of ultrasonically bonding semiconductor elements is provided. The method includes the steps of: (a) aligning surfaces of a plurality of first conductive structures of a first semiconductor element to respective surfaces of a plurality of second conductive structures of a second semiconductor element, wherein the surfaces of each of the plurality of first conductive structures and the plurality of second conductive structures include aluminum; and (b) ultrasonically bonding ones of the first conductive structures to respective ones of the second conductive structures.

According to another exemplary embodiment of the present invention, a semiconductor device is provided. The semiconductor device includes: (a) a first semiconductor element including a plurality of first conductive structures, at least a contact portion of each of the plurality of first conductive structures including aluminum; and (b) a second semiconductor element including a plurality of second conductive structures, at least a contact portion of each of the plurality of second conductive structures including aluminum. The contact portions of ones of the plurality of first conductive structures are in contact with, and are ultrasonically bonded to, respective ones of the contact portions of the plurality of second conductive structures.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention is best understood from the following detailed description when read in connection with the accompanying drawings. It is emphasized that, according to common practice, the various features of the drawings are not to scale. On the contrary, the dimensions of the various features are arbitrarily expanded or reduced for clarity. Included in the drawings are the following figures:

FIGS. 1A-1C are block diagram views of portions of an ultrasonic bonding machine illustrating a structure and method of bonding an upper semiconductor element to a lower semiconductor element in accordance with an exemplary embodiment of the present invention;

FIG. 2A is a block diagram view of portions of an ultrasonic bonding machine illustrating a structure and method of bonding an upper semiconductor element to a lower semiconductor element in accordance with another exemplary embodiment of the present invention;

FIG. 2B is an enlarged view of portion “FIG. 2B” of FIG. 2A;

FIG. 2C is a view of FIG. 2B after ultrasonic bonding;

FIG. 3 is a block diagram view of portions of an ultrasonic bonding machine illustrating a structure and method of bonding an upper semiconductor element to a lower semiconductor element in accordance with yet another exemplary embodiment of the present invention;

FIG. 4A is a block diagram view of portions of an ultrasonic bonding machine illustrating a structure and method of bonding an upper semiconductor element to a lower semiconductor element in accordance with another exemplary embodiment of the present invention;

FIG. 4B is an enlarged view of portion “FIG. 4B” of FIG. 4A;

FIG. 4C is a view of FIG. 4B after ultrasonic bonding;

FIG. 5A is a block diagram view of portions of an ultrasonic bonding machine illustrating a structure and method of bonding an upper semiconductor element to a lower semiconductor element in accordance with another exemplary embodiment of the present invention;

FIG. 5B is an enlarged view of portion “FIG. 5B” of FIG. 5A;

FIG. 5C is a view of FIG. 5B after ultrasonic bonding;

FIG. 6A is a block diagram view of portions of an ultrasonic bonding machine illustrating a structure and method of bonding an upper semiconductor element to a lower semiconductor element in accordance with yet another exemplary embodiment of the present invention;

FIG. 6B is an enlarged view of portion of “FIG. 6B” of FIG. 6A;

FIG. 6C is a view of a portion of FIG. 6A after contact between conductive structures; and

FIG. 7 is a flow diagram illustrating a method of ultrasonically bonding semiconductor elements in accordance with an exemplary embodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION

As used herein, the term “semiconductor element” is intended to refer to any structure including (or configured to include at a later step) a semiconductor chip or die. Exemplary semiconductor elements include a bare semiconductor die, a semiconductor die on a substrate (e.g., a leadframe, a PCB, a carrier, etc.), a packaged semiconductor device, a flip chip semiconductor device, a die embedded in a substrate, a stack of semiconductor die, amongst others. Further, the semiconductor element may include an element configured to be bonded or otherwise included in a semiconductor package (e.g., a spacer to be bonded in a stacked die configuration, a substrate, etc.).

In accordance with certain exemplary embodiments of the present invention, inventive techniques (and structures) are provided for assembling a semiconductor device such as a package on package (i.e., PoP) structure. For example, a plurality of semiconductor elements (which may be packages) may be arranged in a stacked configuration. Each of the elements desirably includes aluminum (or aluminum alloy, or partially aluminum) conductive structures that are ultrasonically bonded together. Such a technique has certain advantages including, for example: a reduced density compared to other interconnection techniques (e.g., solder based PoP techniques); no solder mass reflow utilized in contrast to other interconnection techniques; and room temperature ultrasonic bonding enabled in certain applications through the use of an aluminum to aluminum interconnect.

FIG. 1A illustrates portions of ultrasonic bonding machine 100, including bonding tool 124 and support structure 150. As will be appreciated by those skilled in the art, a thermo-compression bonding machine (such as machine 100, or any of the other machine embodiments described herein) may include many elements not shown in the drawings herein for simplicity. Exemplary elements includes, for example: input elements for providing input workpieces to be bonded with additional semiconductor elements; output elements for receiving processed workpieces that now include additional semiconductor elements; transport systems for moving workpieces; imaging systems for imaging and alignment of workpieces; a bond head assembly carrying the bonding tool; a motion system for moving the bond head assembly; a computer system including software for operating the machine; amongst other elements.

Referring again to FIG. 1A, upper semiconductor element 108 is retained (e.g., by vacuum, such as through vacuum ports defined by the holding surface of holding portion 110) by holding portion 110 of bonding tool 124. Upper semiconductor element 108 includes upper conductive structures 112 a, 112 b on a lower surface thereof. Lower semiconductor element 160 includes semiconductor die 102 bonded to (or otherwise supported by) substrate 104. Lower conductive structures 106 a, 106 b are provided on an upper surface of lower semiconductor die 102. Substrate 104 in turn is supported by support structure 150 (e.g., a heat block of machine 100, an anvil of machine 100, or any other desired support structure). In the configuration shown in FIG. 1A (preparing for bonding), each of upper conductive structures 112 a, 112 b are generally aligned with opposing respective lower conductive structures 106 a, 106 b. Semiconductor element 108 is moved downward through the motion of bonding tool 124 (as shown by the arrows 126 in FIG. 1A). Following this motion, FIG. 1B illustrates contact between the respective conductive structures 106 a, 112 a and 106 b, 112 b. Ultrasonic energy 114 is applied to upper semiconductor element 108 and upper conductive structures 112 a, 112 b through bonding tool 124 using an ultrasonic transducer (not shown but indicated in the drawings as “USG”, that is, ulrasonic generator). For example, an ultrasonic transducer that carries bonding tool 124 may in turn be carried by a bond head assembly of machine 100.

During the ultrasonic bonding, lower conductive structures 106 a, 106 b may be held relatively stationary through the support of lower semiconductor element 160 by support structure 150 (e.g., a support surface of support structure 150 may include one or more vacuum ports to secure substrate 104 to support structure 150 during bonding). Ultrasonic energy 114 (along with optional bond force and/or heat) may cause partial deformation of the conductive structures. For example, conductive structures 106 a, 106 b and 112 a, 112 b are illustrated as being partially deformed in FIG. 1C. Ultrasonic bonds are formed between respective pairs of conductive structures in FIG. 1C. For example, ultrasonic bond 128 a is formed between deformed conductive structures 112 a′/106 a′, and ultrasonic bond 128 b is formed between deformed conductive structures 112 b′/106 b′. Conductive structures 106 a, 106 b; 112 a, 112 b may be formed of aluminum, or aluminum alloys, or may contain aluminum at their bond surfaces, etc.

The respective pairs of conductive elements 106 a, 112 a; 106 b, 112 b may be bonded together at room temperature (without heat being added during the bonding process). Optionally, additional heat may be applied, for example, to: (1) upper semiconductor element 108 through bonding tool 124, thus heating upper conductive elements 112 a, 112 b during the bonding process; and/or (2) lower semiconductor element 160 through support structure 150 (e.g., heat block 150), thus heating lower conductive structures 106 a, 106 b during the bonding process. Such optional heating (e.g., through the bond tool and/or the support structure, etc.) is applicable to any of the embodiments of the present invention illustrated and described herein.

Semiconductor elements 160 and 108 illustrated in FIGS. 1A-1C may be any of a number of semiconductor elements configured to be bonded together. In one very specific example (which may also be applied to the other embodiments illustrated and described herein) semiconductor element 160 is a processor (e.g., a mobile phone processor which may also be known as an APU (application processor unit)) and semiconductor element 108 is a memory device configured to be bonded to the processor as shown in FIGS. 1A-1C.

The conductive structures (i.e., 112 a, 112 b, 106 a, 106 b) shown in FIGS. 1A-1C are illustrated as generic structures. These structures may take many different forms such as conductive pillars, stud bumps (e.g., formed using a stud bumping machine), electroplated conductive structures, sputtered conductive structures, wire portions, bond pads, contact pads, among many others. Various of the other drawings provided herein illustrate specific examples of such structures. In accordance with certain embodiments of the present invention the conductive structures include aluminum at the contact region (i.e., the bonding surface) where they will be bonded to another conductive structure. In such embodiments, the conductive structures may be formed of aluminum, or an aluminum alloy (e.g., aluminum alloyed with copper, aluminum alloyed with silicon and copper, etc.). In other examples, the conductive structures may include a base conductive material other than aluminum (e.g., copper) with aluminum (or aluminum alloy) at the contact region. Throughout the present application, if a conductive structure is referred to as being “aluminum” it is understood that the structure may be aluminum, may be an aluminum alloy, or may include aluminum (or an aluminum alloy) at a contact region of such conductive structure.

FIG. 2A illustrates portions of ultrasonic bonding machine 200, including bonding tool 224 and support structure 250. Upper semiconductor element 208 is retained (e.g., by vacuum) by holding portion 210 of bonding tool 224, and includes upper conductive structures 222 a, 222 b (i.e., conductive aluminum pads 222 a, 222 b) provided at a lower surface thereof. Lower semiconductor element 260 includes semiconductor die 202 bonded to (or otherwise supported by) substrate 204. Lower conductive structures 206 a, 206 b are provided on an upper surface of lower semiconductor die 202. Substrate 204 in turn is supported by support structure 250. In the configuration shown in FIG. 2A, each of upper conductive structures 222 a, 222 b are generally aligned with (and configured to be ultrasonically bonded to) opposing respective lower conductive structures 206 a, 206 b. Lower conductive structure 206 a includes copper (Cu) pillar 230 provided on an upper surface of lower semiconductor die 202, and an upper aluminum contact structure 216 on an upper surface of Cu pillar 230. Upper aluminum contact structure 216 may be, for example, electroplated or sputtered onto the upper surface of lower copper pillar 230. FIG. 2B is an enlarged view of portion “B” of FIG. 2A and illustrates the top of lower conductive structure 206 a at contact with upper conductive element 222 a.

Ultrasonic energy is applied to upper semiconductor element 208 through bonding tool 224 using an ultrasonic transducer (not shown). Ultrasonic energy may cause partial deformation of the conductive structures as illustrated in FIG. 2C. That is, ultrasonic bond 228 is formed between deformed upper conductive structure 222 a′ and deformed contact structure 216′ (as illustrated in FIG. 2C).

As will be appreciated by those skilled in the art, Cu pillar 230 (including electroplated or sputtered aluminum contact structure/portion 216) is just one example of a conductive structure including aluminum. FIG. 2A also illustrates another exemplary conductive structure 206 b. Lower conductive structure 206 b is an aluminum structure (or aluminum alloy structure) such as a portion of aluminum wire (that may be bonded using a wire bonding process), an aluminum pillar, etc.

FIG. 3 illustrates portions of ultrasonic bonding machine 300, including bonding tool 324 and support structure 350. Upper semiconductor element 308 is retained (e.g., by vacuum) by holding portion 310 of bonding tool 324, and includes upper conductive structures 322 a, 322 b (i.e, conductive aluminum pads 322 a, 322 b). FIG. 3 illustrates the bonding of a packaged semiconductor device 360 (i.e., lower semiconductor element 360) to upper semiconductor element 308. Lower semiconductor element 360 includes semiconductor die 302 bonded to (or otherwise supported by) substrate 304. Lower conductive structures 306 a, 306 b are provided on an upper surface of substrate 304. Substrate 304 in turn is supported by support structure 350. Wire loops 320 a, 320 b are bonded between semiconductor die 302 and substrate 304 (while not shown in FIG. 3, die 302 may be flip chip bonded to substrate 304 as opposed to, or in addition to, the wire loop interconnections). A coating/encapsulation 334 (such as a epoxy molding compound) has been applied over die 302 and wire loops 320 a, 320 b. As illustrated, the upper portions of lower conductive structures 306 a, 306 b are exposed above coating/encapsulation 334 to permit electrical connection to upper semiconductor element 308.

In the configuration shown in FIG. 3, each of upper conductive structures 322 a, 322 b are generally aligned with (and configured to be ultrasonically bonded to) opposing respective lower conductive structures 306 a, 306 b. As illustrated in FIG. 3, each of lower conductive structures 306 a, 306 b includes a respective Cu pillar 330 a, 330 b on an upper surface of substrate 304, and a respective upper aluminum contact structure 316 a, 316 b on an upper surface of Cu pillars 330 a, 330 b. Upper aluminum contact structures 316 a, 316 b may be electroplated or sputtered onto the respective upper surfaces of Cu pillars 330 a, 330 b. As shown, semiconductor element 308 has been moved downward through the motion of bonding tool 324 (as shown by the arrows in FIG. 3) so that FIG. 3 illustrates contact between conductive structures 306 a, 322 a and 306 b, 322 b. Ultrasonic energy (with optional heat and/or bond force) is applied to upper semiconductor element 308 (e.g., through bonding tool 324) using an ultrasonic transducer to form ultrasonic bonds between aluminum conductive structures 322 a, 322 b and respective aluminum contact structures 316 a, 316 b.

FIG. 4A illustrates portions of ultrasonic bonding machine 400, including bonding tool 424 and support structure 450. Upper semiconductor element 408 is retained (e.g., by vacuum) by holding portion 410 of bonding tool 424, and includes upper conductive structures 412 a, 412 b (i.e., e.g., sputtered aluminum bumps, aluminum stud bumps, etc.) on a lower surface thereof. Lower semiconductor element 460 includes semiconductor die 402 bonded to (or otherwise supported by) support structure 404 (e.g., an FR4 support structure). Lower conductive structures 406 a, 406 b (i.e., e.g., sputtered aluminum bumps, aluminum stud bumps, etc.) are provided on an upper surface of lower semiconductor die 402. Substrate 404 in turn is supported by support structure 450. In the configuration shown in FIG. 4A, each of upper conductive structures 412 a, 412 b are generally aligned with (and configured to be ultrasonically bonded to) opposing respective lower conductive structures 406 a, 406 b. A detail of structures 412 a, 406 a (before ultrasonic bonding) is shown in FIG. 4B. Referring again to FIG. 4A, semiconductor element 408 has been moved downward through the motion of bonding tool 424 (as shown by the arrows in FIG. 4A) so that contact is shown between conductive structures 406 a, 412 a and 406 b, 412 b. Ultrasonic energy 414 (with optional heat and/or bond force) is applied to upper semiconductor element 408 (e.g., through bonding tool 424) using an ultrasonic transducer to form ultrasonic bonds 428 a, 428 b between deformed upper aluminum conductive structures and respective deformed lower aluminum contact structures (see, e.g., completed ultrasonic bond 428 a′ formed between deformed structure 412 a′ and deformed structure 406 a′ as illustrated in FIG. 4C).

FIG. 5A illustrates portions of ultrasonic bonding machine 500, including bonding tool 524 and support structure 550. Upper semiconductor element 508 retained (e.g., by vacuum) by holding portion 510 of bonding tool 524, and includes upper conductive structures 522 a, 522 b (i.e, conductive aluminum pads 522 a, 522 b). Lower semiconductor element 560 includes semiconductor die 502 bonded to (or otherwise supported by) substrate 504 (e.g., an FR4 support structure). Lower conductive structures 506 a, 506 b (i.e., e.g., sputtered aluminum bumps, aluminum stud bumps, etc.) are provided on an upper surface of lower semiconductor die 502. Substrate 504 in turn is supported by support structure 550. In the configuration shown in FIG. 5A, each of upper conductive structures 522 a, 522 b are generally aligned with (and configured to be ultrasonically bonded to) opposing respective lower conductive structures 506 a, 506 b. A detail of structures 522 a, 506 a (before ultrasonic bonding) is shown in FIG. 5B. As shown, semiconductor element 508 has been moved downward through the motion of bonding tool 524 (as shown by the arrows in FIG. 5A) so that FIG. 5A illustrates contact between conductive structures 506 a, 522 a. Ultrasonic energy (with optional heat and/or bond force) is applied to upper semiconductor element 508 (e.g., through bonding tool 424) using an ultrasonic transducer to form ultrasonic bonds 528 a, 528 b between deformed upper aluminum conductive structures and respective deformed lower aluminum contact structures (see, e.g., completed ultrasonic bond 528 a′ formed between deformed structure 522 a′ and deformed structure 506 a′ as illustrated in FIG. 5C).

FIG. 6A illustrates the ultrasonic bonding machine 600, including bonding tool 624 and support structure 650. In FIG. 6, a plurality of semiconductor elements have been bonded together in a stacked configuration, in accordance with the teachings of the present invention. Specifically, semiconductor element 660 a includes semiconductor die 602 a bonded to (or otherwise supported by) substrate 604 a, where conductive structures 606 a, 606 b (i.e., e.g., sputtered aluminum bumps, aluminum stud bumps, etc.) are provided on an upper surface of semiconductor die 602 a. Semiconductor element 660 a is supported by support structure 650.

Another semiconductor element 660 b (including a corresponding semiconductor die 602 b bonded to, or otherwise supported by, substrate 604 b—and including conductive structures 612 a, 612 b on substrate 604 b) has been previously been bonded to semiconductor element 660 a. More specifically, bonding tool 624 previously bonded (e.g., ultrasonically bonded) element 660 b to element 660 a such that ultrasonic bonds 628 a, 628 b were formed between respective pairs of aluminum conductive structures 612 a, 606 a and 612 b, 606 b. Element 660 b also includes conductive structures 606 a′, 606 b′ which have been bonded to conductive structures of element 660 c in a step described below. FIG. 6B illustrates a detailed view of ultrasonic bond 628 a including deformed conductive structures 612 a, 606 a.

Likewise, another semiconductor element 660 c (including a corresponding semiconductor die 602 c bonded to, or otherwise supported by, substrate 604 c—and including conductive structures 612 a′, 612 b′ on substrate 604 c) has been previously been bonded to semiconductor element 660 b. More specifically, bonding tool 624 previously bonded (e.g., ultrasonically bonded) element 660 c to element 660 b such that ultrasonic bonds 628 a′, 628 b′ were formed between respective pairs of aluminum conductive structures 612 a′, 606 a′ and 612 b′, 606 b′. Element 660 c also includes conductive structures 606 a″, 606 b″ which will be bonded to conductive structures of element 660 d in a step described below.

As shown in FIG. 6A, upper semiconductor element 660 d is retained (e.g., by vacuum) by holding portion 610 of bonding tool 624, and includes semiconductor die 602 d bonded to (or otherwise supported by) substrate 604 d. Conductive structures 612 a″, 612 b″ (i.e., e.g., sputtered aluminum bumps, aluminum stud bumps, etc.) are provided on a lower surface of substrate 604 d. Conductive structures 612 a″, 612 b″ are generally aligned with (and configured to be ultrasonically bonded to) opposing respective conductive structures 606 a″, 606 b″. Semiconductor element 660 d is moved downward through the motion of bonding tool 624 (as shown by the arrows in FIG. 6A). Following this downward motion, contact will occur between respective pairs of conductive structures 612 a″, 606 a″ and 612 b″, 606 b″ (see, e.g., the FIG. 6C detailed view of contact between structures 612 a″, 606 a″ prior to deformation through ultrasonic bonding). Ultrasonic energy is applied to upper semiconductor element 604 d through bonding tool 624 using an ultrasonic transducer (not shown) to form the ultrasonic bonds between respective pairs of conductive structures 612 a″, 606 a″ and 612 b″, 606 b″.

While specific exemplary upper and lower aluminum conductive structures have been illustrated, one skilled in the art would understand that a variety of shapes and designs of upper and lower aluminum conductive structures are permissible within the teachings of the present invention.

FIG. 7 is a flow diagram illustrating a method of bonding semiconductor elements together in accordance with an exemplary embodiment of the present invention. As is understood by those skilled in the art, certain steps included in the flow diagram may be omitted; certain additional steps may be added; and the order of the steps may be altered from the order illustrated. At Step 700, a first semiconductor element (e.g., including a semiconductor die on a substrate) is supported on a support structure of a bonding machine. The first semiconductor element (e.g., an upper surface of the semiconductor structure) includes a plurality of first conductive structures that are at least partially comprised of aluminum (see, e.g., structures 106 a, 106 b of element 160 in FIG. 1A; structures 206 a, 206 b of element 260 in FIG. 2A; structures 306 a, 306 b of element 360 in FIG. 3A; structures 406 a, 406 b of element 460 in FIG. 4A; structures 506 a, 506 b of element 560 in FIG. 5A; and structures 606 a″, 606 b″ of element 660 c in FIG. 6A). At Step 702, a second semiconductor element is retained by a holding portion of a bonding tool of the bonding machine (see, e.g., elements 108, 208, 308, 408, 508, and 660 d in the corresponding figures). The second semiconductor element includes a plurality of second conductive structures (e.g., on a lower surface of the second semiconductor element) that are at least partially comprised of aluminum. At Step 704, the first conductive structures and the second conductive structures are aligned with one another (see, e.g., FIGS. 1A and 6A) and are then brought into contact with one another. At optional Step 706, the plurality of aligned first conductive structures and second conductive structure are pressed together with a predetermined amount of bond force. The predetermined amount of bond force may be a single bond force value, or may be a bond force profile where the actual bond force is varied during the bonding operation. At optional Step 708, heat is applied to the plurality of aligned first conductive structures and/or second conductive structures. For example, heat may be applied to the first conductive structures using the support structure that supports the first semiconductor element. Likewise, heat may be applied to the second conductive structures using the bonding tool that retains the second semiconductor element At Step 710, the plurality of first conductive structures and second conductive structures are ultrasonically bonded together to form ultrasonic bonds therebetween.

As will be appreciated by those skilled in the art, the present invention has particular benefits when an ambient/lower temperature bonding operation is desired as the present invention bonds aluminum materials to aluminum materials which may be readily accomplished with ultrasonic energy and/or bond force, often without the need for heat.

Although the present invention has been illustrated and described primarily with respect to two pairs of conductive structures ultrasonically bonded together, it is of course not limited thereto. In practice, semiconductor packages (e.g., advanced packages) assembled in accordance with the present invention may have any number of conductive structures, and may have hundreds of pairs (or even thousands) of conductive structures ultrasonically bonded together. Further, the conductive structures need not be bonded in pairs. For example, one structure may be bonded to two or more opposing structures. Thus, any number of conductive structures from one semiconductor element may be ultrasonically bonded to any number of conductive structures of another semiconductor element.

Although the present invention primarily describes (and illustrates) the application of ultrasonic energy through a bonding tool (e.g., where the bonding tool is engaged with an ultrasonic transducer), it is not limited thereto. Rather, the ultrasonic energy may be transmitted through any desired structure, such as for example the support structure.

As will be appreciated by those skilled in the art, the details of the ultrasonic bonding may vary widely depending on the specific application. Nonetheless, some non-limiting exemplary details are now described. For example, the frequency of the ultrasonic transducer may be designed in connection with the design of the conductive structures (e.g., pillar structures, etc.), such that a transducer resonant frequency substantially coincides with a resonant frequency of the given semiconductor element—in this regard, the conductive structures may act dynamically as a cantilever beam. In another exemplary alternative, the transducer may be operated at an off-resonant condition relative to the semiconductor element in a simple “driven” type fashion.

Exemplary ranges for the energy applied to the ultrasonic transducer (e.g., applied to piezoelectric crystals/ceramics in the transducer driver) may be in the range of 0.1 kHz-160 kHz, 10 kHz-120 kHz, 20 kHz-60 kHz, etc. A single frequency may be applied, or a plurality of frequencies may be applied during bonding (e.g., sequentially, simultaneously, or both). The scrub of the semiconductor element (i.e., vibrational energy applied to the semiconductor element held by the bonding tool) may be applied in any of a number of desired directions, and may be applied: through a bonding tool holding a semiconductor element (as illustrated herein); through a support structure supporting a semiconductor element; amongst other configurations. Referring specifically to the embodiments illustrated herein (where the ultrasonic energy is applied through a bonding tool holding a semiconductor element), the scrub may be applied in a direction substantially parallel to, or substantially perpendicular to, a longitudinal axis of the bond tool (or in other directions).

The vibrational energy applied by the ultrasonic transducer may be applied, for example, in the peak-to-peak amplitude range of 0.1 um to 10 um (e.g., with feedback control of constant voltage, constant current, or alternate control schemes including but not limited to ramped current, ramped voltage, or proportional feedback control based on one or more inputs).

As described herein, bond force may also be applied during at least a portion of the ultrasonic bonding cycle. An exemplary range for the bond force is 0.1 kg to 100 kg. The bond force may be applied as a constant value, or may be a bond force profile that changes during the bonding cycle. In a controlled bond force implementation, the feedback control of the bond force may be constant, ramped or proportional based on one or more inputs (e.g., ultrasonic amplitude, time, velocity, deformation, temperature, etc).

As described herein, one or more of the semiconductor elements may be heated prior to and/or during the bond cycle. An exemplary range of the temperature of a semiconductor element is between 20° C.-250° C. The heat (e.g., applied through one or both of the bond tool and the support structure, or other elements) may be applied as a constant value, or may be a temperature profile that changes during the bonding cycle—and may be controlled using feedback control.

Although the present invention has been illustrated and described primarily with respect to forming ultrasonic bonds between aluminum conductive structures on respective semiconductor elements, it is of course not limited thereto. That is, the teachings of the present invention may have applicability in forming ultrasonic bonds between conductive structures having varying compositions. An exemplary list of materials for the conductive structures being joined includes: aluminum to copper (i.e., forming ultrasonic bonds between aluminum conductive structures on one semiconductor element to copper conductive structures on another semiconductor element); lead free solder (e.g., primarily composed of tin) to copper lead free solder to aluminum; copper to copper; aluminum to silver; copper to silver; aluminum to gold; and copper to gold. Of course, other combinations of conductive structure compositions (e.g., indium) are contemplated.

Although the invention is illustrated and described herein with reference to specific embodiments, the invention is not intended to be limited to the details shown. Rather, various modifications may be made in the details within the scope and range of equivalents of the claims and without departing from the invention. 

What is claimed:
 1. A semiconductor device comprising: (a) a first semiconductor element including a plurality of first conductive structures, at least a contact portion of each of the plurality of first conductive structures including aluminum; and (b) a second semiconductor element including a plurality of second conductive structures, at least a contact portion of each of the plurality of second conductive structures including aluminum, wherein the contact portions of ones of the plurality of first conductive structures are in contact with, and are ultrasonically bonded to, respective ones of the contact portions of the plurality of second conductive structures, wherein at least one of the plurality of first conductive structures and the plurality of second conductive structures are copper pillar structures at least partially electro-plated with a material including aluminum.
 2. The semiconductor device of claim 1 wherein the first semiconductor element is a semiconductor die.
 3. The semiconductor device of claim 1 wherein each of the first semiconductor element and the second semiconductor element is a respective semiconductor die.
 4. The semiconductor device of claim 1 wherein the first semiconductor element includes a semiconductor die.
 5. The semiconductor device of claim 1 wherein each of the first semiconductor element and the second semiconductor element includes a respective semiconductor die.
 6. The semiconductor device of claim 1 wherein at least one of the plurality of first conductive structures and the plurality of second conductive structures are aluminum wire portions.
 7. The semiconductor device of claim 1 wherein at least one of the plurality of first conductive structures and the plurality of second conductive structures are aluminum bumps.
 8. A semiconductor device comprising: (a) a first semiconductor element including a plurality of first conductive structures, at least a contact portion of each of the plurality of first conductive structures including aluminum; and (b) a second semiconductor element including a plurality of second conductive structures, at least a contact portion of each of the plurality of second conductive structures including aluminum, wherein the contact portions of ones of the plurality of first conductive structures are in contact with, and are ultrasonically bonded to, respective ones of the contact portions of the plurality of second conductive structures, wherein at least one of the plurality of first conductive structures and the plurality of second conductive structures are copper pillar structures at least partially sputtered with a material including aluminum.
 9. The semiconductor device of claim 8 wherein the first semiconductor element is a semiconductor die.
 10. The semiconductor device of claim 8 wherein each of the first semiconductor element and the second semiconductor element is a respective semiconductor die.
 11. The semiconductor device of claim 8 wherein the first semiconductor element includes a semiconductor die.
 12. The semiconductor device of claim 8 wherein each of the first semiconductor element and the second semiconductor element includes a respective semiconductor die.
 13. The semiconductor device of claim 8 wherein at least one of the plurality of first conductive structures and the plurality of second conductive structures are aluminum wire portions.
 14. The semiconductor device of claim 8 wherein at least one of the plurality of first conductive structures and the plurality of second conductive structures are aluminum bumps. 